hi-8585, hi-8586 arinc 429 line driver description direct arinc 429 line driver interface in a small package on-chip zener to set output levels on-chip line driver slope control and selection by logic input low current 12 to 15 volt supplies cmos / ttl logic pins plastic and ceramic package options - surface mount and dip thermally enhanced soic packages mil processing available features pin configuration slp1.5 tx0in tx1in gnd v- txaout txbout v+ supply voltages function table the hi-8585 and hi-8586 are cmos integrated circuits designed to directly drive the arinc 429 bus in an 8-pin package. two logic inputs control a differential voltage between the output pins producing a +10 volt one, a -10 volt zero, and a 0 volt null. the cmos/ttl control inputs are translated to arinc specified amplitudes using on board zeners. a logic input is provided to control the slope of the differential output signal. timing is set by on-chip resistor and capacitor and tested to be within arinc requirements. the hi-8585 has 37.5 ohms in series with each line driver output. the hi-8586 provides the option to bypass part of the output resistance so that external series protection circuits can add their resistances. the hi-8585 or the hi-8586 along with the hi-8588 line receiver offer the smallest options available to get on and off the arinc bus. pin description table v+ = 12v to 15v v- = -12v to -15v 1 2 3 45 6 7 8 august 2006 www.holtic.com (ds8585 rev. j) 08/06 1 2 3 4 5 6 7 8 pin slp 1.5 tx0in tx1in gnd v- txaout txbout v+ symbol logic input logic input logic input power power output output power function cmos or ttl, v+ is ok cmos or ttl cmos or ttl ground -12 to -15 volts line driver terminal a line driver terminal b +12 to +15 volts description 0 0 0 1 1 1 tx1in tx0in slp1.5 txaout txbout slope 0 1 1 0 0 1 x 0 1 0 1 x 0v -5v -5v 5v 5v 0v 0v 5v 5v -5v -5v 0v n/a 10 s 1.5 s 10 s 1.5 s n/a holt integrated circuits
figure 2 shows a possible application of the hi-8585/86 interfacing an arinc transmit channel from the hi-6010. hi-8585, hi-8586 functional description txaout current control -5v 5v one null zero control logic txbout current control -5v 5v slp1.5 esd protection and voltage translation tx0in tx1in figure 1 - line driver block diagram hi-8585 = 37.5 ohms hi-858 6 = 2 ohms hi-8585 = 37.5 ohms hi-8586 = 2 ohms one null zero control logic ?a? side ?b? side gnd 8 txbout txaout tx1in tx0in arinc channel rinb rina testa testb { hardwired or driven from logic routb routa 5v vcc v- -15v slp1.5 txd0 txd1 rxd0 rxd1 hi-6010 8 bit bus arinc channel 1 2 8 6 7 4 3 45 6 7 2 3 hi-8588 figure 2 - application diagram application information 15v v+ 1 5 hi-8585 figure 1 is a block diagram of the line driver. the +5v and -5v levels are generated internally using on-chip zeners. currents for slope control are set by zener voltages across on-chip resistors. the tx0in and tx1in inputs receive logic signals from a control transmitter chip such as the hi-6010, hi-3282 or hi-8282. txaout and txbout hold each side of the arinc bus at ground until one of the inputs becomes a one. if for example tx1in goes high, a charging path is enabled to 5v on an ?a? side internal capacitor while the ?b? side is enabled to -5v. the charging current is se- lected by the slp1.5 pin. if the slp1.5 pin is high, the capacitor is nominally charged from 10% to 90% in 1.5s. if slp1.5 is low, the rise and fall times are 10s. a unity gain buffer receives the internally generated slopes and differentially drives the arinc line. current is limited by the series output resistors at each pin. there are no fuses at the outputs of the hi-8585 as exists on the hi- 8382. the hi-8585 has 37.5 ohms in series with each output and the hi-8586 has 2 ohms in series with each output. the hi-8586 is for applications where external series resis- tance is required, typically for lightning protection devices. both the hi-8585 and hi-8586 are built using high-speed cmos technology. care should be taken to ensure the v+ and v- supplies are locally decoupled and that the input waveforms are free from negative voltage spikes which may upset the chip?s internal slope control circuitry. holt integrated circuits 2
note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. hi-8585, hi-8586 voltages referenced to ground supply voltages v+....................................................20v v-....................................................-20v dc current per input pin................ +10ma power dissipation at 25c plastic dil............1.0w, derate 10mw/c ceramic dil..........0.5w, derate 7mw/c solder temperature ........275c for 10 sec storage temperature........-65c to +150c absolute maximum ratings recommended operating conditions supply voltages v+.................................+11.4v to +16.5v v-.................................. -11.4v to -16.5v temperature range industrial screening.........-40c to +85c hi-temp screening........-55c to +125c military screening..........-55c to +125c dc electrical characteristics v+ = +12v to +15v, v- = -12v to -15v, t = operating temperature range (unless otherwise stated) a parameters symbol test conditions min typ max units input voltage (tx1in, tx0in, slp1.5) high v 2.1 - v+ volts low v - - 0.5 volts input current (tx1in, tx0in, slp1.5) source i v = 0v - - 0.1 a sink i = 5v - - 0.1 a arinc output voltage (differential) zero v no load -11.00 -10.00 -9.00 volts null v no load -0.50 0 0.50 volts v+ i - 6.0 14.0 ma v- i -14.0 -6.0 - ma arinc output impedence z hi-8585 - 37.5 - ohms hi-8586 - - 5 ohms ih il ih in il diff0 diffn dd ee out v one v no load; txaout - txbout 9.00 10.00 11.00 volts ; txaout - txbout ; txaout - txbout arinc output voltage (ref. to gnd) one or zero v no load & magnitude at pin 4.50 5.00 5.50 volts null v no load -0.25 0 0.25 volts operating supply current in diff1 dout nout slp1.5 = v+ tx1in & tx0in = 0v: no load in & tx1in = 0v: no load tx0 holt integrated circuits 3
v+ = 15.0v, v- = -15v, t = operating temperature range (unless otherwise stated) a defined in figure 3, no load pin 1 = logic 1 input capacitance (1) hi-8585, hi-8586 ac electrical characteristics parameters symbol test conditions min typ max units line driver propagation delay output high to low output low to high line driver transition times output high to low output low to high t phlx plhx t t fx rx t - - 1.0 1.0 2.0 2.0 500 500 1.5 1.5 ns ns s s logic c in - - 10 pf pin 1 = logic 1 - - notes: 1. guaranteed but not tested figur e 3 - line driver timing 0v 10v -10v 5v 0v 5v 0v t rx t 10% 90% t t 10% 90% t rx t phlx t phlx t plhx t 10% plhx t pin 3 pin 2 t fx t fx v pin 6 - pin 7 diff slp 1.5 = v+ pin 1 = logic 1 output high to low output low to high t fx rx t 5.0 5.0 15.0 15.0 10.0 10.0 s s pin 1 = logic 1 slp 1.5 = gnd low speed high speed holt integrated circuits 4
hi-8585, hi-8586 notes: 1. all data taken in still air on devices soldered to single layer copper pcb (3" x 4.5" x .062"). 2. at 100% duty cycle, 15v power supplies. for 12v power supplies multiply all tabulated values by 0.8. 3. low speed: data rate = 12.5 kbps, load : r = 400 ohms ,c=30nf. 4. high speed: data rate = 100 kbps, load : r = 400 ohms ,c=10nf. data not presented fo rc=30nf as this is considered unrealistic for high speed operation. 5. 8 lead plastic esoic (thermally enhanced soic with built in heat sink). heat sink not soldered to the pcb. 6. 8 lead plastic esoic (thermally enhanced soic with built in heat sink). heat sink soldered to the pcb. 7. similar results would be obtained with txaout shorted to txbout. 8. for applications requiring survival with continuous short circuit, operation above tj = 175c is not recommended. 9. data will vary depending on air flow and the method of heat sinking employed. 10. current values are per supply. package thermal characteristics supply current (ma) 2 junction temp, tj (c) ta = 25 o cta=85 o c ta=125 o cta=25 o cta=85 o c ta=125 o c low speed 3 16.8 17.2 16.9 58 116 157 high speed 4 27.3 26.7 25.9 75 132 169 low speed 17.4 17.5 16.9 68 126 166 high speed 27.6 27.1 25.9 97 147 186 low speed 17.1 17.2 16.7 52 110 151 high speed 27.3 27.1 26.2 57 112 157 supply current (ma) 2 junction temp, tj (c) ta = 25 o cta=85 o c ta=125 o cta=25 o cta=85 o c ta=125 o c low speed 3 53.6 50.7 52.2 131 181 217 high speed 4 46.9 38.7 42.5 135 181 219 low speed 46.4 47.6 68.1 167 191 221 high speed 42.1 43.8 67.1 177 212 223 low speed 48.5 45.6 46.1 112 161 186 high speed 46.8 41.1 40.5 116 168 197 maximum arinc load 9, 10 txaout and txbout shorted to ground 7, 8, 9, 10 8 lead plastic esoic 5 8 lead plastic esoic 6 arinc 429 data rate arinc 429 data rate package style 1 8 lead plastic dip 8 lead plastic dip 8 lead plastic esoic 5 8 lead plastic esoic 6 package style 1 heat sink - esoic packages an 8-pin thermally enhanced soic package is used for the hi-8585/hi-8586 products. the esoic package includes a metal heat sink located on the bottom surface of the device. this heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. the heat sink is electrically isolated from the chip and can be soldered to any ground or power plane. however, since the chip?s substrate is at v+, connecting the heat sink to this power plane is recommended to avoid coupling noise into the circuit. holt integrated circuits 5
hi-8585, hi-8586 legend: nb - narrow body esoic - thermally enhanced small outline package (soic w/built-in heat sink) ordering information 37.5 ohms 0 2 ohms 35.5 ohms package description temperature range 8 pin plastic dip 8 pin plastic esoic - nb 8 pin cerdip (not available pb-free) flow burn in -40c to +85c no i -55c to +125c -55c to +125c no yes t m hi - 85xx xx x x part number t m i part number pd ps cr part number 8585 8586 output series resistance built-in required externally part number lead finish 100% matte tin (pb-free, rohs compliant) f tin / lead (sn / pb) solder blank holt integrated circuits 6
hi-8585 / hi-8586 package dimensions inches (millimeters) holt integrated circuits 7 8-pin plastic dip package type: 8p .385 .015 (4.699 .381) 7 typ. .025 .010 (.635 .254) .335 .035 (8.509 .889) .250 .010 (6.350 .254) .100 .010 (3.540 .254) .135 .015 (3.429 .381) .055 .010 (1.397 .254) .1375 .0125 (3.493 .318) .019 .002 (.483 .102) .0115 .0035 (.292 .089) .300 .010 (7.620 .254) d etail a 8-pin plastic small outline (esoic) - nb (narrow body, thermally enhanced) .033 .017 (.8382 .4318) .050 .010 (1.27 .254) package type: 0 to 8 8hne p in 1 d etail a top view bottom view .1535 .0035 (3.90 .09) .1935 .0035 (4.915 .085) .236 .008 (5.994 .203) .0085 .0015 (.2159 .0381) .0165 .0035 (.4191 .0889) .140 .010 (3.556 .254) .100 .010 (2.540 .254) .0025 .0015 (.0635 .0381) .055 .005 (1.397 .127) electrically isolated metal heat sink on bottom of package (connect to any ground or power plane for optimum thermal dissipation)
hi-8585 / hi-8586 package dimensions inches (millimeters) holt integrated circuits 8 8-pin cerdip package type: 8d .380 .004 (9.652 .102) .005 min. (.127 min.) .314 .003 (7.976 .076) .200 max. (5.080 max.) .248 .003 (6.299 .076) .039 .006 (.991 .154) .163 .037 (4.140 .940) .018 .006 (.457 .152) .056 .006 (1.422 .152) .015 min. (.381 min.) .350 .030 (8.890 .762) .010 .006 (.254 .152) base plane seating plane .100 .008 (2.540 .203)
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